1. Field of the Invention
The invention relates to a method of ion implantation, and more particularly to a method of field implantation in a dynamic random access memory (DRAM). The predetermined source/drain region of a subsequently formed transistor is covered and implanted with high concentration ions. An ion field is formed, so that in the transistor, no ion field is formed underneath the source/drain region. In addition to the function of device isolation, the ion field effectively reduces the junction capacitance and leakage current. Moreover, the sensitivity of data access is enhanced.
2. Description of the Related Art
In FIG. 1, a conventional method of field implantation is shown. On a substrate 10, for example, a P-type substrate, a field oxide layer 30 is formed. According to a required depth, P-type ions are implanted to the substrate 10. A P-type ion field to increase the doping concentration under the channel, or as a device isolation, or a P-field, is formed by the P-type ions 20a in the substrate 10. Similarly, if an N-type substrate is in use, N-type ions are implanted to form an N-type ion field (N-field).
In FIG. 2, a DRAM formed by using the substrate is shown in FIG. 1. The method of forming the DRAM is not described here for it is a well-know technique. The disadvantages of the method are as follows.
1. The junction gradient between the connecting point 210 and the substrate 10 is too high, so that the leakage current is increased.
2. In the area of the bit line connecting point, the very high junction gradient causes a larger junction capacitance between the bit line and the substrate.
3. As the junction capacitance between the bit line and the substrate increases, the ratio of Cb/Cs is increased to lower the sensitivity of data access.